1. Technical Field
The present disclosure relates to a thin-film transistor array panel and a manufacturing method thereof. More particularly, the present disclosure relates to a thin-film transistor array panel and a manufacturing method thereof for minimizing a change of parasitic capacitance and ensuring high luminance by improving the aperture ratio of pixels.
2. Description of the Related Art
A liquid crystal display (LCD) is one of the most commonly used flat panel displays, and it includes two substrates with electrodes formed thereon and a liquid crystal layer interposed between the two substrates. In the LCD, a voltage is applied to the electrodes to realign liquid crystal molecules of the liquid crystal layer, to thereby regulate the transmittance of light passing through the liquid crystal layer.
A thin-film transistor array panel is one of at least two panels of the liquid crystal display. The thin-film transistor array panel includes a scanning signal line or a gate line transmitting a scanning signal, an image signal line or a data line transmitting an image signal, a thin-film transistor connected to the gate line and data line, and a pixel electrode connected to the thin-film transistor of each pixel.
In the thin-film transistor array panel, parasitic capacitances are generated between the gate electrode and the source electrode (Cgs), and between the gate electrode and the drain electrode (Cgd). The magnitude of these parasitic capacitances depends on the size of the overlapping area between the gate electrode and the source electrode, for Cgs, and the size of the overlapping area between the gate electrode and the drain electrode, for Cgd. Therefore, if the area of a drain electrode is increased, the aperture ratio deteriorates and the parasitic capacitance increases. As a result, a kickback voltage may be increased, with the consequent image deterioration of the liquid crystal display.
As a result, a thin-film transistor array panel and a method of manufacturing thereof is needed such that the area of a drain electrode and the area of a source electrode may be reduced, which may minimize parasitic capacitance effects and enhance the aperture ratio and the luminance of an LCD panel.